Synthesis and Optimization of Interface Hardware

I n system-on-a-chip design, interfacing of Intellectual Property(IP) blocks is one of the most important issues. Since most IP’s are provided b y different vendors, they have different interface schemes and diflerent operating frequencies. I n this paper, we propose a new interface synthesis method that enables one not only to handle the interface between IP’s with different operating frequencies but also to minimize the hardware resource required for the interface. W e have demonstrated the proposed algorithm b y applying it to a real design example, MP3 decoder, and verified the IIS-toPCI protocol converter on a real hardware system.